A _________ is a small, very-high-speed memory maintained by the instruction fetch stage of the pipeline and containing the n most recently fetched instructions in sequence.
A. loop buffer
B. delayed branch
C. multiple stream
D. branch prediction
a. a procedure can be called from more than one location
b. a procedure call can appear in a procedure
c. each procedure call is matched by a return in the called program
d. all of the above
The _________ table provides the value of the next output when the inputs and the present output are known, which is exactly the information needed to design the counter or any sequential circuit.