The _________ is a small cache memory associated with the instruction fetch stage of the pipeline.

The _________ is a small cache memory associated with the instruction fetch stage of the pipeline. A. dynamic branch B. loop table C. branch history...

A _________ is a small, very-high-speed memory maintained by the instruction fetch stage of the pipeline and containing the n most recently fetched instructions in sequence.

A _________ is a small, very-high-speed memory maintained by the instruction fetch stage of the pipeline and containing the n most recently fetched...

_______ is a pipeline hazard.

_______ is a pipeline hazard. A. Control B. Resource C. Data D. All of the above Answer:...

The ________ determines the opcode and the operand specifiers.

The ________ determines the opcode and the operand specifiers. A. decode instruction B. fetch operands C. calculate operands D. execute instruction Answer:...

The _________ contains a word of data to be written to memory or the word most recently read.

The _________ contains a word of data to be written to memory or the word most recently read. A. MAR B. PC C. MBR D. IR Answer:...

________ are bits set by the processor hardware as the result of operations.

________ are bits set by the processor hardware as the result of operations. A. MIPS B. Condition codes C. Stacks D. PSWs Answer: ...

____ is a design principle employed in designing the PDP-10 instruction set.

____ is a design principle employed in designing the PDP-10 instruction set. a. Orthogonality b. Completeness c. Direct addressing d. All of the above Answer: All...

All instructions in the ARM architecture are __________ bits long and follow a regular format.

All instructions in the ARM architecture are __________ bits long and follow a regular format. a. 8 b. 16 c. 32 d. 64 Answer: ...

The _________ was designed to provide a powerful and flexible instruction set within the constraints of a 16-bit minicomputer.

The _________ was designed to provide a powerful and flexible instruction set within the constraints of a 16-bit minicomputer. a. PDP-1 b. PDP-8 c....

_______ is a principle by which two variables are independent of each other.

_______ is a principle by which two variables are independent of each other. a. Opcode b. Orthogonality c. Completeness d. Autoindexing Answer:...

The only form of addressing for branch instructions is _________ addressing.

The only form of addressing for branch instructions is _________ addressing. a. register b. relative c. base d. immediate Answer: immedia...

_______ has the advantage of flexibility, but the disadvantage of complexity.

_______ has the advantage of flexibility, but the disadvantage of complexity. a. Stack addressing b. Displacement addressing c. Direct addressing d....

_____ has the advantage of large address space, however it has the disadvantage of multiple memory references.

_____ has the advantage of large address space, however it has the disadvantage of multiple memory references. a. Indirect addressing b. Direct addressing c....

The advantage of __________ is that no memory reference other than the instruction fetch is required to obtain the operand.

The advantage of __________ is that no memory reference other than the instruction fetch is required to obtain the operand. a. direct addressing b....

A branch instruction in which the branch is always taken is _________.

A branch instruction in which the branch is always taken is _________. a. conditional branch b. unconditional branch c. jump d. bi-endian Answer: unconditional...

The entire set of parameters, including return address, which is stored for a procedure invocation is referred to as a _________.

The entire set of parameters, including return address, which is stored for a procedure invocation is referred to as a _________. a. branch b. stack...

Which of the following is a true statement?

Which of the following is a true statement? a. a procedure can be called from more than one location b. a procedure call can appear in a procedure c....

The most fundamental type of machine instruction is the _________ instruction.

The most fundamental type of machine instruction is the _________ instruction. a. conversion b. data transfer c. arithmetic d. logical Answer: data...

_______ instructions provide computational capabilities for processing number data.

_______ instructions provide computational capabilities for processing number data. a. Boolean b. Logic c. Memory d. Arithmetic Answer: Ar...

The _________ table provides the value of the next output when the inputs and the present output are known, which is exactly the information needed to design the counter or any sequential circuit.

The _________ table provides the value of the next output when the inputs and the present output are known, which is exactly the information needed...

Counters can be designated as _________.

Counters can be designated as _________. a. asynchronous b. synchronous c. both asynchronous and synchronous d. neither asynchronous or synchronous Answer: both...

A _________ accepts and/or transfers information serially.

A _________ accepts and/or transfers information serially. a. S-R latch b. shift register c. FPGA d. parallel register Answer: shift regi...

The ________ exists in one of two states and, in the absence of input, remains in that state.

The ________ exists in one of two states and, in the absence of input, remains in that state. a. assert b. complex PLD c. decoder d. flip-flop ...

For more than four variables an alternative approach is a tabular technique referred to as the _________ method.

For more than four variables an alternative approach is a tabular technique referred to as the _________ method. a. DeMorgan b. Quine-McCluskey c....

Which of the following is a functionally complete set?

Which of the following is a functionally complete set? a. AND, NOT b. NOR c. AND, OR, NOT d. all of the above Answer: all of the abo...

A _______ is an electronic circuit that produces an output signal that is a simple Boolean operation on its input signals.

A _______ is an electronic circuit that produces an output signal that is a simple Boolean operation on its input signals. a. gate b. decoder c. counter d....

The unary operation _________ inverts the value of its operand.

The unary operation _________ inverts the value of its operand. a. OR b. NOT c. NAND d. XOR Answer: N...

The operation _________ yields true if either or both of its operands are true.

The operation _________ yields true if either or both of its operands are true. a. NOT b. AND c. NAND d. OR Answer: ...

Binary 0101 is hexadecimal _________.

Binary 0101 is hexadecimal _________. a. 0 b. 5 c. A d. 10 Answer: ...

Another term for "base" is __________.

Another term for "base" is __________. a. radix b. integer c. position d. digit Answer: rad...

Decimal "10" is __________ in binary.

Decimal "10" is __________ in binary. a. 1000 b. 0010 c. 1010 d. 0001 Answer: 10...

Hexadecimal has a base of _________.

Hexadecimal has a base of _________. a. 2 b. 8 c. 10 d. 16 Answer: ...

Numbers in the binary system are represented to the _________.

Numbers in the binary system are represented to the _________. a. base 0 b. base 1 c. base 2 d. base 10 Answer: base...

In the number 3109, the 3 is referred to as the _________.

In the number 3109, the 3 is referred to as the _________. a. most significant digit b. least significant digit c. radix d. base Answer: most...

Which of the following is correct?

Which of the following is correct? a. 25 = (2 x 102) + (5 x 101) b. 289 = (2 x 103) + (8 x 101) + (9 x 100) c. 7523 = (7 x 103) + (5 x 102) + (2 x...

Which digit represents "hundreds" in the number 8732?

Which digit represents "hundreds" in the number 8732? a. 8 b. 7 c. 3 d. 2 Answer: ...

The OS maintains a __________ for each process that shows the frame location for each page of the process.

The OS maintains a __________ for each process that shows the frame location for each page of the process. a. kernel b. page table c. TLB d. logical...

A _________ is a collection of memory regions.

A _________ is a collection of memory regions. a. APX b. nucleus c. domain d. page table Answer: doma...

The _________ scheduler determines which programs are admitted to the system for processing.

The _________ scheduler determines which programs are admitted to the system for processing. a. long-term b. medium-term c. short-term d. I/O A...

A _________ is a special type of programming language used to provide instructions to the monitor.

A _________ is a special type of programming language used to provide instructions to the monitor. a. job control language b. multiprogram c. kernel d....

A _________ system works only one program at a time.

A _________ system works only one program at a time. a. batch b. uniprogramming c. kernel d. privileged instruction Answer: uniprogrammi...

The ________ gives a program access to the hardware resources and services available in a system through the user instruction set architecture supplemented with high-level language library calls.

The ________ gives a program access to the hardware resources and services available in a system through the user instruction set architecture supplemented...

The _________ defines the repertoire of machine language instructions that a computer can follow.

The _________ defines the repertoire of machine language instructions that a computer can follow. a. ABI b. API c. HLL d. ISA Answer: I...

Facilities and services provided by the OS that assist the programmer in creating programs are in the form of _________ programs that are not actually part of the OS but are accessible through the OS.

Facilities and services provided by the OS that assist the programmer in creating programs are in the form of _________ programs that are not actually...

A ________ connects InfiniBand subnets, or connects an InfiniBand switch to a network such as a local area network, wide area network, or storage area network.

A ________ connects InfiniBand subnets, or connects an InfiniBand switch to a network such as a local area network, wide area network, or storage area...

______ is a digital display interface standard now widely adopted for computer monitors, laptop displays, and other graphics and video interfaces.

______ is a digital display interface standard now widely adopted for computer monitors, laptop displays, and other graphics and video interfaces. a....

The 8237 DMA is known as a _________ DMA controller.

The 8237 DMA is known as a _________ DMA controller. a. command b. cycle stealing c. interrupt d. fly-by Answer: fly-...

_____ is when the DMA module must force the processor to suspend operation temporarily.

_____ is when the DMA module must force the processor to suspend operation temporarily. a. Interrupt b. Thunderbolt c. Cycle stealing d. Lock down Answer: Cycle...

The _________ command causes the I/O module to take an item of data from the data bus and subsequently transmit that data item to the peripheral.

The _________ command causes the I/O module to take an item of data from the data bus and subsequently transmit that data item to the peripheral. a....

An I/O module that is quite primitive and requires detailed control is usually referred to as an _________.

An I/O module that is quite primitive and requires detailed control is usually referred to as an _________. a. I/O command b. I/O controller c. I/O...

An I/O module that takes on most of the detailed processing burden, presenting a high-level interface to the processor, is usually referred to as an _________.

An I/O module that takes on most of the detailed processing burden, presenting a high-level interface to the processor, is usually referred to as an...

The most common means of computer/user interaction is a __________.

The most common means of computer/user interaction is a __________. a. keyboard/monitor b. mouse/printer c. modem/printer d. monitor/printer An...

The _________ contains logic for performing a communication function between the peripheral and the bus.

The _________ contains logic for performing a communication function between the peripheral and the bus. a. I/O channel b. I/O module c. I/O processor d....

_____ is when the disk rotates more slowly for accesses near the outer edge than for those near the center.

_____ is when the disk rotates more slowly for accesses near the outer edge than for those near the center. a. Constant angular velocity (CAV) b....

A _________ is a high-definition video disk that can store 25 Gbytes on a single layer on a single side.

A _________ is a high-definition video disk that can store 25 Gbytes on a single layer on a single side. a. DVD b. DVD-R c. DVD-RW d. Blu-ray DVD Answer: Blu-ray...

________ is the standardized scheme for multiple-disk database design.

________ is the standardized scheme for multiple-disk database design. a. RAID b. CAV c. CLV d. SSD Answer: RA...

The sum of the seek time and the rotational delay equals the _________, which is the time it takes to get into position to read or write.

The sum of the seek time and the rotational delay equals the _________, which is the time it takes to get into position to read or write. a. access...

When the magnetizable coating is applied to both sides of the platter the disk is then referred to as _________.

When the magnetizable coating is applied to both sides of the platter the disk is then referred to as _________. a. multiple sided b. substrate c....

A __________ disk is permanently mounted in the disk drive, such as the hard disk in a personal computer.

A __________ disk is permanently mounted in the disk drive, such as the hard disk in a personal computer. a. nonremovable b. movable-head c. double...

The disadvantage of _________ is that the amount of data that can be stored on the long outer tracks is only the same as what can be stored on the short inner tracks.

The disadvantage of _________ is that the amount of data that can be stored on the long outer tracks is only the same as what can be stored on the short...

Scanning information at the same rate by rotating the disk at a fixed speed is known as the _________.

Scanning information at the same rate by rotating the disk at a fixed speed is known as the _________. a. constant angular velocity b. magnetoresistive c....

Data are transferred to and from the disk in __________.

Data are transferred to and from the disk in __________. a. tracks b. gaps c. sectors d. pits Answer: secto...

Adjacent tracks are separated by _________.

Adjacent tracks are separated by _________. a. sectors b. gaps c. pits d. heads Answer: ga...

Greater ability to withstand shock and damage, improvement in the uniformity of the magnet film surface to increase disk reliability, and a significant reduction in overall surface defects to help reduce read-write errors, are all benefits of ___________.

Greater ability to withstand shock and damage, improvement in the uniformity of the magnet film surface to increase disk reliability, and a significant...

The ________ enables the RAM chip to preposition bits to be placed on the data bus as rapidly as possible.

The ________ enables the RAM chip to preposition bits to be placed on the data bus as rapidly as possible. a. flash memory b. Hamming code c. RamBus d....

_________ increases the data transfer rate by increasing the operational frequency of the RAM chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip.

_________ increases the data transfer rate by increasing the operational frequency of the RAM chip and by increasing the prefetch buffer from 2 bits...

The _________ exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without imposing wait states.

The _________ exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without...

________ can be caused by power supply problems or alpha particles.

________ can be caused by power supply problems or alpha particles. a. Soft errors b. AGT errors c. Hard errors d. SEC errors Answer: Soft...

With _________ the microchip is organized so that a section of memory cells are erased in a single action.

With _________ the microchip is organized so that a section of memory cells are erased in a single action. a. flash memory b. SDRAM c. DRAM d. EEPROM Answer: flash...

A __________ contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it.

A __________ contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it. a. RAM b. SRAM c....

Which of the following memory types are nonvolatile?

Which of the following memory types are nonvolatile? a. erasable PROM b. programmable ROM c. flash memory d. all of the above Answer: all of...

One distinguishing characteristic of memory that is designated as _________ is that it is possible to both to read data from the memory and to write new data into the memory easily and rapidly.

One distinguishing characteristic of memory that is designated as _________ is that it is possible to both to read data from the memory and to write...

Which properties do all semiconductor memory cells share?

Which properties do all semiconductor memory cells share? a. they exhibit two stable states which can be used to represent binary 1 and 0 b. they...

In reference to access time to a two-level memory, a _________ occurs if an accessed word is not found in the faster memory.

In reference to access time to a two-level memory, a _________ occurs if an accessed word is not found in the faster memory. a. miss b. hit c. line d....

The key advantage of the __________ design is that it eliminates contention for the cache between the instruction fetch/decode unit and the execution unit.

The key advantage of the __________ design is that it eliminates contention for the cache between the instruction fetch/decode unit and the execution...

When using the __________ technique all write operations made to main memory are made to the cache as well.

When using the __________ technique all write operations made to main memory are made to the cache as well. a. write back b. LRU c. write through d....

________ is the simplest mapping technique and maps each block of main memory into only one possible cache line.

________ is the simplest mapping technique and maps each block of main memory into only one possible cache line. a. Direct mapping b. Associative...

A line includes a _________ that identifies which particular block is currently being stored.

A line includes a _________ that identifies which particular block is currently being stored. a. cache b. hit c. tag d. locality Answer: t...

The ________ consists of the access time plus any additional time required before a second access can commence.

The ________ consists of the access time plus any additional time required before a second access can commence. a. latency b. memory cycle time c....

For random-access memory, __________ is the time from the instant that an address is presented to the memory to the instant that data have been stored or made available for use.

For random-access memory, __________ is the time from the instant that an address is presented to the memory to the instant that data have been stored...

An individual blocks or records have a unique address based on physical location with __________.

An individual blocks or records have a unique address based on physical location with __________. a. associative b. physical access c. direct access d....

"Memory is organized into records and access must be made in a specific linear sequence" is a description of __________.

"Memory is organized into records and access must be made in a specific linear sequence" is a description of __________. a. sequential access b. direct...

For internal memory, the __________ is equal to the number of electrical lines into and out of the memory module.

For internal memory, the __________ is equal to the number of electrical lines into and out of the memory module. a. access time b. unit of transfer c....

The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.

The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the...

A sequence of codes or instructions is called __________.

A sequence of codes or instructions is called __________. a. software b. memory c. an interconnect d. a register Answer: softwa...

The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects.

The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects. a. link b. protocol c....

A __________ is the high-level set of rules for exchanging packets of data between devices.

A __________ is the high-level set of rules for exchanging packets of data between devices. a. bus b. protocol c. packet d. QPI Answer: pr...

A(n) _________ is generated by some condition that occurs as a result of an instruction execution.

A(n) _________ is generated by some condition that occurs as a result of an instruction execution. a. timer interrupt b. I/O interrupt c. program...

Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton.

Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton. a. John...

The processing required for a single instruction is called a(n) __________ cycle.

The processing required for a single instruction is called a(n) __________ cycle. a. execute b. fetch c. instruction d. packet Answer: ins...

The data lines provide a path for moving data among system modules and are collectively called the _________.

The data lines provide a path for moving data among system modules and are collectively called the _________. a. control bus b. address bus c. data...

The interconnection structure must support which transfer?

The interconnection structure must support which transfer? a. memory to processor b. processor to memory c. I/O to or from memory d. all of the above Answer: all...

The TL supports which of the following address spaces?

The TL supports which of the following address spaces? a. memory b. I/O c. message d. all of the above Answer: all of the abo...

The von Neumann architecture is based on which concept?

The von Neumann architecture is based on which concept? a. data and instructions are stored in a single read-write memory b. the contents of this...

ARM processors are designed to meet the needs of _________.

ARM processors are designed to meet the needs of _________. a. embedded real-time systems b. application platforms c. secure applications d. all of...

With the __________, Intel introduced the use of superscalar techniques that allow multiple instructions to execute in parallel.

With the __________, Intel introduced the use of superscalar techniques that allow multiple instructions to execute in parallel. a. Core b. 8080 c....

The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.

The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the...

During the _________ the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR.

During the _________ the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR. a. execute cycle b....

The memory of the IAS consists of 1000 storage locations called __________.

The memory of the IAS consists of 1000 storage locations called __________. a. opcodes b. wafers c. VLSIs d. words Answer: wor...

The __________ interprets the instructions in memory and causes them to be executed.

The __________ interprets the instructions in memory and causes them to be executed. a. main memory b. control unit c. I/O d. arithmetic and logic...

The ENIAC used __________.

The ENIAC used __________. a. vacuum tubes b. integrated circuits c. IAS Answer: vacuum tub...

The Electronic Numerical Integrator and Computer project was a response to U.S. needs during _________.

The Electronic Numerical Integrator and Computer project was a response to U.S. needs during _________.a. the Civil Warb. the French-American Warc. World...

The _________ stores data.

The _________ stores data.a. system busb. I/Oc. main memoryd. control unitAnswer: main mem...

The __________ moves data between the computer and its external environment.

The __________ moves data between the computer and its external environment.a. data transportb. I/Oc. registerd. CPU interconnectionAnswer: ...

A common example of system interconnection is by means of a __________.

A common example of system interconnection is by means of a __________.a. registerb. system busc. data transportd. control deviceAnswer: system ...

The _________ was the world's first general-purpose electronic digital computer.

The _________ was the world's first general-purpose electronic digital computer.a. UNIVACb. MARK IVc. ENIACd. Hollerith's Counting MachineAnswer:&nbs...

________ attributes include hardware details transparent to the programmer.

________ attributes include hardware details transparent to the programmer.a. Interfaceb. Organizationalc. Memoryd. ArchitecturalAnswer: Organiz...

It is a(n) _________ design issue whether a computer will have a multiply instruction.

It is a(n) _________ design issue whether a computer will have a multiply instruction.a. architecturalb. memoryc. elementaryd. organizationalAnswer:&...

It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.

It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of...

A __________ system is a set of interrelated subsystems.

A __________ system is a set of interrelated subsystems.a. secondaryb. hierarchicalc. complexd. functionalAnswer: hierarchi...

When data are moved over longer distances, to or from a remote device, the process is known as __________.

When data are moved over longer distances, to or from a remote device, the process is known as __________.a. data communicationsb. registeringc. structuringd....

Computer technology is changing at a __________ pace.

Computer technology is changing at a __________ pace.a. slowb. slow to mediumc. rapidd. non-existentAnswer: ra...

Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.

Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.a. organizationb. specificsc. designd. ...

The MIPS R4000 uses ________ bits for all internal and external data paths and for addresses, registers, and the ALU.

The MIPS R4000 uses ________ bits for all internal and external data paths and for addresses, registers, and the ALU.a. 16b. 32c. 64d. 128Answer:&nbs...

SPARC refers to an architecture defined by ________.

SPARC refers to an architecture defined by ________.a. Microsoftb. Applec. Sun Microsystemsd. IBMAnswer: Sun Microsyst...

The R4000 pipeline stage where the instruction result is written back to the register file is the __________ stage.

The R4000 pipeline stage where the instruction result is written back to the register file is the __________ stage.a. write backb. tag checkc. data cached....

The first commercial RISC product was _________.

The first commercial RISC product was _________.a. SPARCb. CISCc. VAXd. the PyramidAnswer: the Pyra...

Which stage is required for load and store operations?

Which stage is required for load and store operations?a. Ib. Ec. Dd. all of the aboveAnswer: all of the ab...

A ________ instruction can be used to account for data and branch delays.

A ________ instruction can be used to account for data and branch delays.a. SUBb. NOOPc. JUMPd. all of the aboveAnswer: N...

The instruction location immediately following the delayed branch is referred to as the ________.

The instruction location immediately following the delayed branch is referred to as the ________.a. delay loadb. delay filec. delay slotd. delay registerAnswer: delay...

_________ determines the control and pipeline organization.

_________ determines the control and pipeline organization.a. Calculationb. Execution sequencingc. Operations performedd. Operands usedAnswer: Execution...

______ registers may be used only to hold data and cannot be employed in the calculation of an operand address.

______ registers may be used only to hold data and cannot be employed in the calculation of an operand address.A. General purposeB. DataC. AddressD. Condition...

_____ is used for debugging.

_____ is used for debugging.A. Direction flagB. Alignment checkC. Trap flagD. Identification flagAnswer:...

For the _________ mode, the operand is included in the instruction.

For the _________ mode, the operand is included in the instruction.a. immediateb. basec. registerd. displacementAnswer: immedi...

Which of the following interrelated factors go into determining the use of the addressing bits?

Which of the following interrelated factors go into determining the use of the addressing bits?a. number of operandsb. number of register setsc. address...

The __________ byte consists of three fields: the Scale field, the Index field and the Base field.

The __________ byte consists of three fields: the Scale field, the Index field and the Base field.a. SIBb. VAXc. PDP-11d. ModR/MAnswer: ...

_____ are a set of storage locations.

_____ are a set of storage locations.A. ProcessorsB. PSWsC. RegistersD. Control unitsAnswer:...

For _________, the address field references a main memory address and the referenced register contains a positive displacement from that address.

For _________, the address field references a main memory address and the referenced register contains a positive displacement from that address.a. indexingb....

Indexing performed after the indirection is __________.

Indexing performed after the indirection is __________.a. relative addressingb. autoindexingc. postindexingd. preindexingAnswer: postindex...

Which data type is defined in MMX?

Which data type is defined in MMX?a. packed byteb. packed wordc. packed doublewordd. all of the aboveAnswer: all of the ab...

The principal advantage of ___________ addressing is that it is a very simple form of addressing.

The principal advantage of ___________ addressing is that it is a very simple form of addressing.a. displacementb. registerc. stackd. directAnswer:&n...

The advantages of _________ addressing are that only a small address field is needed in the instruction and no time-consuming memory references are required.

The advantages of _________ addressing are that only a small address field is needed in the instruction and no time-consuming memory references are required.a....

_______ instructions are needed to transfer programs and data into memory and the results of computations back out to the user.

_______ instructions are needed to transfer programs and data into memory and the results of computations back out to the user.a. I/Ob. Transferc. Controld....

The x86 data type that is a signed binary value contained in a byte, word, or doubleword, using twos complement representation is _________.

The x86 data type that is a signed binary value contained in a byte, word, or doubleword, using twos complement representation is _________.a. generalb....

The _________ instruction includes an implied address.

The _________ instruction includes an implied address.a. skipb. rotatec. stackd. pushAnswer: s...

Which ARM operation category includes logical instructions (AND, OR, XOR), add and subtract instructions, and test and compare instructions?

Which ARM operation category includes logical instructions (AND, OR, XOR), add and subtract instructions, and test and compare instructions?a. data-processing...

In the ARM architecture only _________ instructions access memory locations.

In the ARM architecture only _________ instructions access memory locations.a. data processingb. status register accessc. load and stored. branchAnswer: load...

A(n) _________ expresses operations in a concise algebraic form using variables.

A(n) _________ expresses operations in a concise algebraic form using variables.a. opcodeb. high-level languagec. machine languaged. registerAnswer: high-level...

There must be ________ instructions for moving data between memory and the registers.

There must be ________ instructions for moving data between memory and the registers.a. branchb. logicc. memoryd. I/OAnswer: mem...

______ instructions operate on the bits of a word as bits rather than as numbers, providing capabilities for processing any other type of data the user may wish to employ.

______ instructions operate on the bits of a word as bits rather than as numbers, providing capabilities for processing any other type of data the user...

______ are used in digital circuits to control signal and data routing.

______ are used in digital circuits to control signal and data routing.a. Multiplexersb. Program countersc. Flip-flopsd. GatesAnswer: Multiplex...

_______ is implemented with combinational circuits.

_______ is implemented with combinational circuits.a. Nano memoryb. Random access memoryc. Read only memoryd. No memoryAnswer: Read only mem...

The ________ flip-flop has two inputs and all possible combinations of input values are valid.

The ________ flip-flop has two inputs and all possible combinations of input values are valid.a. J-Kb. Dc. S-Rd. clocked S-RAnswer: ...

CPUs make use of _________ counters, in which all of the flip-flops of the counter change at the same time.

CPUs make use of _________ counters, in which all of the flip-flops of the counter change at the same time.a. synchronousb. asynchronousc. clocked S-Rd....

The ________ specifies the operation to be performed.

The ________ specifies the operation to be performed.a. source operand referenceb. opcodec. next instruction referenced. processor registerAnswer:&nb...

Four bits is called a _________.

Four bits is called a _________.a. radix pointb. bytec. nibbled. binary digitAnswer: nib...

In the number 472.156 the 2 is the _________.

In the number 472.156 the 2 is the _________.a. most significant digitb. radix pointc. least significant digitd. none of the aboveAnswer: none of...

The operand ________ yields true if and only if both of its operands are true.

The operand ________ yields true if and only if both of its operands are true.a. XORb. ORc. ANDd. NOTAnswer: ...

Decimal "10" is _________ in hexadecimal.

Decimal "10" is _________ in hexadecimal.a. 1b. Ac. 0d. FFAnswer:&nbs...

With _________ the virtual address is the same as the physical address.

With _________ the virtual address is the same as the physical address.a. unsegmented unpaged memoryb. unsegmented paged memoryc. segmented unpaged memoryd....

The decimal system has a base of _________.

The decimal system has a base of _________.a. 0b. 10c. 100d. 1000Answer: ...

In the number 3109, the 9 is referred to as the _________.

In the number 3109, the 9 is referred to as the _________.a. most significant digitb. least significant digitc. radixd. baseAnswer: least significant...

The binary string 110111100001 is equivalent to __________.

The binary string 110111100001 is equivalent to __________.a. DE116b. C7816c. FF6416d. B8F16Answer: DE...

The _________ system uses only the numbers 0 and 1.

The _________ system uses only the numbers 0 and 1.a. positionalb. binaryc. hexadecimald. decimalAnswer: bin...

The _________ defines the system call interface to the operating system and the hardware resources and services available in a system through the user instruction set architecture.

The _________ defines the system call interface to the operating system and the hardware resources and services available in a system through the user...

The ________ scheduler is also known as the dispatcher.

The ________ scheduler is also known as the dispatcher.a. long-termb. medium-termc. short-termd. I/OAnswer: short-t...

A _________ is an actual location in main memory.

A _________ is an actual location in main memory.a. logical addressb. partition addressc. base addressd. physical addressAnswer: physical addr...

_______ is when the processor spends most of its time swapping pages rather than executing instructions.

_______ is when the processor spends most of its time swapping pages rather than executing instructions.a. Swappingb. Thrashingc. Pagingd. Multitaski...

Virtual memory schemes make use of a special cache called a ________ for page table entries.

Virtual memory schemes make use of a special cache called a ________ for page table entries.a. TLBb. HLLc. VMCd. SPBAnswer: ...

The ________ command is used to activate a peripheral and tell it what to do.

The ________ command is used to activate a peripheral and tell it what to do.a. controlb. testc. readd. writeAnswer: cont...

The Thunderbolt protocol _________ layer is responsible for link maintenance including hot-plug detection and data encoding to provide highly efficient data transfer.

The Thunderbolt protocol _________ layer is responsible for link maintenance including hot-plug detection and data encoding to provide highly efficient...

A ________ is used to connect storage systems, routers, and other peripheral devices to an InfiniBand switch.

A ________ is used to connect storage systems, routers, and other peripheral devices to an InfiniBand switch.a. target channel adapterb. InfiniBand switchc....

The __________ is a program that controls the execution of application programs and acts as an interface between applications and the computer hardware.

The __________ is a program that controls the execution of application programs and acts as an interface between applications and the computer hardware.a....

Theoretically, a DDR module can transfer data at a clock rate in the range of __________ MHz.

Theoretically, a DDR module can transfer data at a clock rate in the range of __________ MHz.a. 200 to 600b. 400 to 1066c. 600 to 1400d. 800 to 1600Answer: 200...

A DDR3 module transfers data at a clock rate of __________ MHz.A DDR3 module transfers data at a clock rate of __________ MHz.

A DDR3 module transfers data at a clock rate of __________ MHz.a. 600 to 1200b. 800 to 1600c. 1000 to 2000d. 1500 to 3000Answer: 800 to 1...

In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly universal sector size.

In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly universal sector size.a. 64b. 128c. 256d. 512Answer...

The set of all the tracks in the same relative position on the platter is referred to as a _________.

The set of all the tracks in the same relative position on the platter is referred to as a _________.a. floppy diskb. single-sided diskc. sectord. cy...

The I/O function includes a _________ requirement to coordinate the flow of traffic between internal resources and external devices.

The I/O function includes a _________ requirement to coordinate the flow of traffic between internal resources and external devices.a. cycleb. status...

______ can send data to the processor twice per clock cycle.

______ can send data to the processor twice per clock cycle.a. CDRAMb. SDRAMc. DDR-DRAMd. RDRAMAnswer: DDR-D...

The Pentium 4 _________ component executes micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers.

The Pentium 4 _________ component executes micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers.a....

A logical cache stores data using __________.

A logical cache stores data using __________.a. physical addressesb. virtual addressesc. random addressesd. none of the aboveAnswer: virtual add...

In a _________, binary values are stored using traditional flip-flop logic-gate configurations.

In a _________, binary values are stored using traditional flip-flop logic-gate configurations.a. ROMb. SRAMc. DRAMd. RAMAnswer: S...

_______ can be caused by harsh environmental abuse, manufacturing defects, and wear.

_______ can be caused by harsh environmental abuse, manufacturing defects, and wear.a. SEC errorsb. Hard errorsc. Syndrome errorsd. Soft errorsAnswer: Hard...

Each data path consists of a pair of wires (referred to as a __________) that transmits data one bit at a time.

Each data path consists of a pair of wires (referred to as a __________) that transmits data one bit at a time.a. laneb. pathc. lined. busAnswer:&nbs...

A bus that connects major computer components (processor, memory, I/O) is called a __________.

A bus that connects major computer components (processor, memory, I/O) is called a __________.a. system busb. address busc. data busd. control busAnswer: system...

_______ refers to whether memory is internal or external to the computer.

_______ refers to whether memory is internal or external to the computer.a. Locationb. Accessc. Hierarchyd. TagAnswer: Locat...

Internal memory capacity is typically expressed in terms of _________.

Internal memory capacity is typically expressed in terms of _________.a. hertzb. nanosc. bytesd. LORAnswer: by...

A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is referred to as a _________.

A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is referred to as a _________.a. disk cacheb. latencyc....

A(n) _________ is generated by a failure such as power failure or memory parity error.

A(n) _________ is generated by a failure such as power failure or memory parity error.a. I/O interruptb. hardware failure interruptc. timer interruptd....

One increment, or pulse, of the system clock is referred to as a _________.

One increment, or pulse, of the system clock is referred to as a _________.a. clock tickb. cycle timec. clock rated. cycle speedAnswer:...

The __________ measures the ability of a computer to complete a single task.

The __________ measures the ability of a computer to complete a single task.a. clock speedb. speed metricc. execute cycled. cycle timeAnswer:...

Second generation computers used __________.

Second generation computers used __________.a. integrated circuitsb. Transistorsc. vacuum tubesd. large-scale integrationAnswer:...

The __________ defines the third generation of computers.

The __________ defines the third generation of computers.a. integrated circuitb. vacuum tubec. transistord. VLSIAnswer:...

The __________ performs the computer's data processing functions.

The __________ performs the computer's data processing functions.a. Registerb. CPU interconnectionc. ALUd. system busAnswer:...

The ENIAC is an example of a _________ generation computer.

The ENIAC is an example of a _________ generation computer.a. firstb. secondc. thirdd. fourthAnswer:...

The __________ contains the 8-bit opcode instruction being executed.

The __________ contains the 8-bit opcode instruction being executed.a. memory buffer registerb. instruction buffer registerc. instruction registerd. memory...

The Patterson study examined the dynamic behavior of _________ programs, independent of the underlying architecture.

The Patterson study examined the dynamic behavior of _________ programs, independent of the underlying architecture.a. HLLb. RISCc. CISCd. all of the...

Architectural attributes include __________ .

Architectural attributes include __________ .a. I/O mechanismsb. control signalsc. interfacesd. memory technology usedAnswer:...

An I/O device is referred to as a __________.

An I/O device is referred to as a __________.a. CPUb. control devicec. peripherald. registerAnswer:...

A _________ is a mechanism that provides for communication among CPU, main memory, and I/O.

A _________ is a mechanism that provides for communication among CPU, main memory, and I/O.a. system interconnectionb. CPU interconnectionc. peripherald....

________ provide storage internal to the CPU.

________ provide storage internal to the CPU.a. Control unitsb. ALUsc. Main memoryd. RegistersAnswer:...

A ________ hazard occurs when there is a conflict in the access of an operand location.

A ________ hazard occurs when there is a conflict in the access of an operand location.A. resourceB. dataC. structuralD. controlAnswer:...

The ARM architecture supports _______ execution modes.

The ARM architecture supports _______ execution modes.A. 2B. 8C. 11D. 7Answer:...

The ________ controls the movement of data and instructions into and out of the processor.

The ________ controls the movement of data and instructions into and out of the processor.A. control unitB. ALUC. shifterD. branchAnswer:...

The _________ contains the address of an instruction to be fetched.

The _________ contains the address of an instruction to be fetched.A. instruction registerB. memory address registerC. memory buffer registerD. program...

The areas between pits are called _________.

The areas between pits are called _________.a. landsb. sectorsc. cylindersd. stripsAnswer:...

The ________ layer is the key to the operation of Thunderbolt and what makes it attractive as a high-speed peripheral I/O technology.

The ________ layer is the key to the operation of Thunderbolt and what makes it attractive as a high-speed peripheral I/O technology.a. cableb. applicationc....

The ________ contains I/O protocols that are mapped on to the transport layer.

The ________ contains I/O protocols that are mapped on to the transport layer.a. cableb. applicationc. common transportd. physicalAnswer:...

A _________ is a PLD featuring a general structure that allows very high logic capacity and offers more narrow logic resources and a higher ration of flip-flops to logic resources than do CPLDs.

A _________ is a PLD featuring a general structure that allows very high logic capacity and offers more narrow logic resources and a higher ration of...

The __________ are used to designate the source or destination of the data on the data bus.

The __________ are used to designate the source or destination of the data on the data bus.a. system linesb. data linesc. control linesd. address linesAnswer:...

______ increases the prefetch buffer size to 8 bits.

______ increases the prefetch buffer size to 8 bits.a. CDRAMb. RDRAMc. DDR3d. all of the aboveAnswer:...

RAID level ________ has the highest disk overhead of all RAID types.

RAID level ________ has the highest disk overhead of all RAID types.a. 0b. 1c. 3d. 5Answer:...